#[doc = "Register `I2C_ICR` writer"]
pub struct W(crate::W<I2C_ICR_SPEC>);
impl core::ops::Deref for W {
    type Target = crate::W<I2C_ICR_SPEC>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
impl core::ops::DerefMut for W {
    #[inline(always)]
    fn deref_mut(&mut self) -> &mut Self::Target {
        &mut self.0
    }
}
impl core::convert::From<crate::W<I2C_ICR_SPEC>> for W {
    fn from(writer: crate::W<I2C_ICR_SPEC>) -> Self {
        W(writer)
    }
}
#[doc = "TX FIFO data completion interrupt clear.\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CLR_INT_TXFIFO_OVER_AW {
    #[doc = "0: not cleared."]
    NOT_CLEARED = 0,
    #[doc = "1: cleared."]
    CLEARED = 1,
}
impl From<CLR_INT_TXFIFO_OVER_AW> for bool {
    #[inline(always)]
    fn from(variant: CLR_INT_TXFIFO_OVER_AW) -> Self {
        variant as u8 != 0
    }
}
#[doc = "Field `clr_int_txfifo_over` writer - TX FIFO data completion interrupt clear."]
pub struct CLR_INT_TXFIFO_OVER_W<'a> {
    w: &'a mut W,
}
impl<'a> CLR_INT_TXFIFO_OVER_W<'a> {
    #[doc = r"Writes `variant` to the field"]
    #[inline(always)]
    pub fn variant(self, variant: CLR_INT_TXFIFO_OVER_AW) -> &'a mut W {
        self.bit(variant.into())
    }
    #[doc = "not cleared."]
    #[inline(always)]
    pub fn not_cleared(self) -> &'a mut W {
        self.variant(CLR_INT_TXFIFO_OVER_AW::NOT_CLEARED)
    }
    #[doc = "cleared."]
    #[inline(always)]
    pub fn cleared(self) -> &'a mut W {
        self.variant(CLR_INT_TXFIFO_OVER_AW::CLEARED)
    }
    #[doc = r"Sets the field bit"]
    #[inline(always)]
    pub fn set_bit(self) -> &'a mut W {
        self.bit(true)
    }
    #[doc = r"Clears the field bit"]
    #[inline(always)]
    pub fn clear_bit(self) -> &'a mut W {
        self.bit(false)
    }
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub fn bit(self, value: bool) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9);
        self.w
    }
}
#[doc = "TX FIFO overflow interrupt clear.\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CLR_INT_TXTIDE_AW {
    #[doc = "0: not cleared."]
    NOT_CLEARED = 0,
    #[doc = "1: cleared."]
    CLEARED = 1,
}
impl From<CLR_INT_TXTIDE_AW> for bool {
    #[inline(always)]
    fn from(variant: CLR_INT_TXTIDE_AW) -> Self {
        variant as u8 != 0
    }
}
#[doc = "Field `clr_int_txtide` writer - TX FIFO overflow interrupt clear."]
pub struct CLR_INT_TXTIDE_W<'a> {
    w: &'a mut W,
}
impl<'a> CLR_INT_TXTIDE_W<'a> {
    #[doc = r"Writes `variant` to the field"]
    #[inline(always)]
    pub fn variant(self, variant: CLR_INT_TXTIDE_AW) -> &'a mut W {
        self.bit(variant.into())
    }
    #[doc = "not cleared."]
    #[inline(always)]
    pub fn not_cleared(self) -> &'a mut W {
        self.variant(CLR_INT_TXTIDE_AW::NOT_CLEARED)
    }
    #[doc = "cleared."]
    #[inline(always)]
    pub fn cleared(self) -> &'a mut W {
        self.variant(CLR_INT_TXTIDE_AW::CLEARED)
    }
    #[doc = r"Sets the field bit"]
    #[inline(always)]
    pub fn set_bit(self) -> &'a mut W {
        self.bit(true)
    }
    #[doc = r"Clears the field bit"]
    #[inline(always)]
    pub fn clear_bit(self) -> &'a mut W {
        self.bit(false)
    }
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub fn bit(self, value: bool) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8);
        self.w
    }
}
#[doc = "RX FIFO overflow interrupt clear.\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CLR_INT_RXTIDE_AW {
    #[doc = "0: not cleared."]
    NOT_CLEARED = 0,
    #[doc = "1: cleared."]
    CLEARED = 1,
}
impl From<CLR_INT_RXTIDE_AW> for bool {
    #[inline(always)]
    fn from(variant: CLR_INT_RXTIDE_AW) -> Self {
        variant as u8 != 0
    }
}
#[doc = "Field `clr_int_rxtide` writer - RX FIFO overflow interrupt clear."]
pub struct CLR_INT_RXTIDE_W<'a> {
    w: &'a mut W,
}
impl<'a> CLR_INT_RXTIDE_W<'a> {
    #[doc = r"Writes `variant` to the field"]
    #[inline(always)]
    pub fn variant(self, variant: CLR_INT_RXTIDE_AW) -> &'a mut W {
        self.bit(variant.into())
    }
    #[doc = "not cleared."]
    #[inline(always)]
    pub fn not_cleared(self) -> &'a mut W {
        self.variant(CLR_INT_RXTIDE_AW::NOT_CLEARED)
    }
    #[doc = "cleared."]
    #[inline(always)]
    pub fn cleared(self) -> &'a mut W {
        self.variant(CLR_INT_RXTIDE_AW::CLEARED)
    }
    #[doc = r"Sets the field bit"]
    #[inline(always)]
    pub fn set_bit(self) -> &'a mut W {
        self.bit(true)
    }
    #[doc = r"Clears the field bit"]
    #[inline(always)]
    pub fn clear_bit(self) -> &'a mut W {
        self.bit(false)
    }
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub fn bit(self, value: bool) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u32) & 0x01) << 7);
        self.w
    }
}
#[doc = "TX completion interrupt clear for the start condition of the master.\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CLR_INT_START_AW {
    #[doc = "0: not cleared."]
    NOT_CLEARED = 0,
    #[doc = "1: cleared."]
    CLEARED = 1,
}
impl From<CLR_INT_START_AW> for bool {
    #[inline(always)]
    fn from(variant: CLR_INT_START_AW) -> Self {
        variant as u8 != 0
    }
}
#[doc = "Field `clr_int_start` writer - TX completion interrupt clear for the start condition of the master."]
pub struct CLR_INT_START_W<'a> {
    w: &'a mut W,
}
impl<'a> CLR_INT_START_W<'a> {
    #[doc = r"Writes `variant` to the field"]
    #[inline(always)]
    pub fn variant(self, variant: CLR_INT_START_AW) -> &'a mut W {
        self.bit(variant.into())
    }
    #[doc = "not cleared."]
    #[inline(always)]
    pub fn not_cleared(self) -> &'a mut W {
        self.variant(CLR_INT_START_AW::NOT_CLEARED)
    }
    #[doc = "cleared."]
    #[inline(always)]
    pub fn cleared(self) -> &'a mut W {
        self.variant(CLR_INT_START_AW::CLEARED)
    }
    #[doc = r"Sets the field bit"]
    #[inline(always)]
    pub fn set_bit(self) -> &'a mut W {
        self.bit(true)
    }
    #[doc = r"Clears the field bit"]
    #[inline(always)]
    pub fn clear_bit(self) -> &'a mut W {
        self.bit(false)
    }
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub fn bit(self, value: bool) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u32) & 0x01) << 6);
        self.w
    }
}
#[doc = "TX completion interrupt clear for the stop condition of the master.\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CLR_INT_STOP_AW {
    #[doc = "0: not cleared."]
    NOT_CLEARED = 0,
    #[doc = "1: cleared."]
    CLEARED = 1,
}
impl From<CLR_INT_STOP_AW> for bool {
    #[inline(always)]
    fn from(variant: CLR_INT_STOP_AW) -> Self {
        variant as u8 != 0
    }
}
#[doc = "Field `clr_int_stop` writer - TX completion interrupt clear for the stop condition of the master."]
pub struct CLR_INT_STOP_W<'a> {
    w: &'a mut W,
}
impl<'a> CLR_INT_STOP_W<'a> {
    #[doc = r"Writes `variant` to the field"]
    #[inline(always)]
    pub fn variant(self, variant: CLR_INT_STOP_AW) -> &'a mut W {
        self.bit(variant.into())
    }
    #[doc = "not cleared."]
    #[inline(always)]
    pub fn not_cleared(self) -> &'a mut W {
        self.variant(CLR_INT_STOP_AW::NOT_CLEARED)
    }
    #[doc = "cleared."]
    #[inline(always)]
    pub fn cleared(self) -> &'a mut W {
        self.variant(CLR_INT_STOP_AW::CLEARED)
    }
    #[doc = r"Sets the field bit"]
    #[inline(always)]
    pub fn set_bit(self) -> &'a mut W {
        self.bit(true)
    }
    #[doc = r"Clears the field bit"]
    #[inline(always)]
    pub fn clear_bit(self) -> &'a mut W {
        self.bit(false)
    }
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub fn bit(self, value: bool) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5);
        self.w
    }
}
#[doc = "Master TX interrupt clear.\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CLR_INT_TX_AW {
    #[doc = "0: not cleared."]
    NOT_CLEARED = 0,
    #[doc = "1: cleared."]
    CLEARED = 1,
}
impl From<CLR_INT_TX_AW> for bool {
    #[inline(always)]
    fn from(variant: CLR_INT_TX_AW) -> Self {
        variant as u8 != 0
    }
}
#[doc = "Field `clr_int_tx` writer - Master TX interrupt clear."]
pub struct CLR_INT_TX_W<'a> {
    w: &'a mut W,
}
impl<'a> CLR_INT_TX_W<'a> {
    #[doc = r"Writes `variant` to the field"]
    #[inline(always)]
    pub fn variant(self, variant: CLR_INT_TX_AW) -> &'a mut W {
        self.bit(variant.into())
    }
    #[doc = "not cleared."]
    #[inline(always)]
    pub fn not_cleared(self) -> &'a mut W {
        self.variant(CLR_INT_TX_AW::NOT_CLEARED)
    }
    #[doc = "cleared."]
    #[inline(always)]
    pub fn cleared(self) -> &'a mut W {
        self.variant(CLR_INT_TX_AW::CLEARED)
    }
    #[doc = r"Sets the field bit"]
    #[inline(always)]
    pub fn set_bit(self) -> &'a mut W {
        self.bit(true)
    }
    #[doc = r"Clears the field bit"]
    #[inline(always)]
    pub fn clear_bit(self) -> &'a mut W {
        self.bit(false)
    }
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub fn bit(self, value: bool) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4);
        self.w
    }
}
#[doc = "Master RX interrupt clear.\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CLR_INT_RX_AW {
    #[doc = "0: not cleared."]
    NOT_CLEARED = 0,
    #[doc = "1: cleared."]
    CLEARED = 1,
}
impl From<CLR_INT_RX_AW> for bool {
    #[inline(always)]
    fn from(variant: CLR_INT_RX_AW) -> Self {
        variant as u8 != 0
    }
}
#[doc = "Field `clr_int_rx` writer - Master RX interrupt clear."]
pub struct CLR_INT_RX_W<'a> {
    w: &'a mut W,
}
impl<'a> CLR_INT_RX_W<'a> {
    #[doc = r"Writes `variant` to the field"]
    #[inline(always)]
    pub fn variant(self, variant: CLR_INT_RX_AW) -> &'a mut W {
        self.bit(variant.into())
    }
    #[doc = "not cleared."]
    #[inline(always)]
    pub fn not_cleared(self) -> &'a mut W {
        self.variant(CLR_INT_RX_AW::NOT_CLEARED)
    }
    #[doc = "cleared."]
    #[inline(always)]
    pub fn cleared(self) -> &'a mut W {
        self.variant(CLR_INT_RX_AW::CLEARED)
    }
    #[doc = r"Sets the field bit"]
    #[inline(always)]
    pub fn set_bit(self) -> &'a mut W {
        self.bit(true)
    }
    #[doc = r"Clears the field bit"]
    #[inline(always)]
    pub fn clear_bit(self) -> &'a mut W {
        self.bit(false)
    }
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub fn bit(self, value: bool) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3);
        self.w
    }
}
#[doc = "Slave ACK error interrupt clear.\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CLR_INT_ACK_ERR_AW {
    #[doc = "0: not cleared."]
    NOT_CLEARED = 0,
    #[doc = "1: cleared."]
    CLEARED = 1,
}
impl From<CLR_INT_ACK_ERR_AW> for bool {
    #[inline(always)]
    fn from(variant: CLR_INT_ACK_ERR_AW) -> Self {
        variant as u8 != 0
    }
}
#[doc = "Field `clr_int_ack_err` writer - Slave ACK error interrupt clear."]
pub struct CLR_INT_ACK_ERR_W<'a> {
    w: &'a mut W,
}
impl<'a> CLR_INT_ACK_ERR_W<'a> {
    #[doc = r"Writes `variant` to the field"]
    #[inline(always)]
    pub fn variant(self, variant: CLR_INT_ACK_ERR_AW) -> &'a mut W {
        self.bit(variant.into())
    }
    #[doc = "not cleared."]
    #[inline(always)]
    pub fn not_cleared(self) -> &'a mut W {
        self.variant(CLR_INT_ACK_ERR_AW::NOT_CLEARED)
    }
    #[doc = "cleared."]
    #[inline(always)]
    pub fn cleared(self) -> &'a mut W {
        self.variant(CLR_INT_ACK_ERR_AW::CLEARED)
    }
    #[doc = r"Sets the field bit"]
    #[inline(always)]
    pub fn set_bit(self) -> &'a mut W {
        self.bit(true)
    }
    #[doc = r"Clears the field bit"]
    #[inline(always)]
    pub fn clear_bit(self) -> &'a mut W {
        self.bit(false)
    }
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub fn bit(self, value: bool) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2);
        self.w
    }
}
#[doc = "Bus arbitration failure interrupt clear.\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CLR_INT_ARB_LOSS_AW {
    #[doc = "0: not cleared."]
    NOT_CLEARED = 0,
    #[doc = "1: cleared."]
    CLEARED = 1,
}
impl From<CLR_INT_ARB_LOSS_AW> for bool {
    #[inline(always)]
    fn from(variant: CLR_INT_ARB_LOSS_AW) -> Self {
        variant as u8 != 0
    }
}
#[doc = "Field `clr_int_arb_loss` writer - Bus arbitration failure interrupt clear."]
pub struct CLR_INT_ARB_LOSS_W<'a> {
    w: &'a mut W,
}
impl<'a> CLR_INT_ARB_LOSS_W<'a> {
    #[doc = r"Writes `variant` to the field"]
    #[inline(always)]
    pub fn variant(self, variant: CLR_INT_ARB_LOSS_AW) -> &'a mut W {
        self.bit(variant.into())
    }
    #[doc = "not cleared."]
    #[inline(always)]
    pub fn not_cleared(self) -> &'a mut W {
        self.variant(CLR_INT_ARB_LOSS_AW::NOT_CLEARED)
    }
    #[doc = "cleared."]
    #[inline(always)]
    pub fn cleared(self) -> &'a mut W {
        self.variant(CLR_INT_ARB_LOSS_AW::CLEARED)
    }
    #[doc = r"Sets the field bit"]
    #[inline(always)]
    pub fn set_bit(self) -> &'a mut W {
        self.bit(true)
    }
    #[doc = r"Clears the field bit"]
    #[inline(always)]
    pub fn clear_bit(self) -> &'a mut W {
        self.bit(false)
    }
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub fn bit(self, value: bool) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1);
        self.w
    }
}
#[doc = "Bus transfer completion interrupt clear.\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CLR_INT_DONE_AW {
    #[doc = "0: not cleared."]
    NOT_CLEARED = 0,
    #[doc = "1: cleared."]
    CLEARED = 1,
}
impl From<CLR_INT_DONE_AW> for bool {
    #[inline(always)]
    fn from(variant: CLR_INT_DONE_AW) -> Self {
        variant as u8 != 0
    }
}
#[doc = "Field `clr_int_done` writer - Bus transfer completion interrupt clear."]
pub struct CLR_INT_DONE_W<'a> {
    w: &'a mut W,
}
impl<'a> CLR_INT_DONE_W<'a> {
    #[doc = r"Writes `variant` to the field"]
    #[inline(always)]
    pub fn variant(self, variant: CLR_INT_DONE_AW) -> &'a mut W {
        self.bit(variant.into())
    }
    #[doc = "not cleared."]
    #[inline(always)]
    pub fn not_cleared(self) -> &'a mut W {
        self.variant(CLR_INT_DONE_AW::NOT_CLEARED)
    }
    #[doc = "cleared."]
    #[inline(always)]
    pub fn cleared(self) -> &'a mut W {
        self.variant(CLR_INT_DONE_AW::CLEARED)
    }
    #[doc = r"Sets the field bit"]
    #[inline(always)]
    pub fn set_bit(self) -> &'a mut W {
        self.bit(true)
    }
    #[doc = r"Clears the field bit"]
    #[inline(always)]
    pub fn clear_bit(self) -> &'a mut W {
        self.bit(false)
    }
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub fn bit(self, value: bool) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1);
        self.w
    }
}
impl W {
    #[doc = "Bit 9 - TX FIFO data completion interrupt clear."]
    #[inline(always)]
    pub fn clr_int_txfifo_over(&mut self) -> CLR_INT_TXFIFO_OVER_W {
        CLR_INT_TXFIFO_OVER_W { w: self }
    }
    #[doc = "Bit 8 - TX FIFO overflow interrupt clear."]
    #[inline(always)]
    pub fn clr_int_txtide(&mut self) -> CLR_INT_TXTIDE_W {
        CLR_INT_TXTIDE_W { w: self }
    }
    #[doc = "Bit 7 - RX FIFO overflow interrupt clear."]
    #[inline(always)]
    pub fn clr_int_rxtide(&mut self) -> CLR_INT_RXTIDE_W {
        CLR_INT_RXTIDE_W { w: self }
    }
    #[doc = "Bit 6 - TX completion interrupt clear for the start condition of the master."]
    #[inline(always)]
    pub fn clr_int_start(&mut self) -> CLR_INT_START_W {
        CLR_INT_START_W { w: self }
    }
    #[doc = "Bit 5 - TX completion interrupt clear for the stop condition of the master."]
    #[inline(always)]
    pub fn clr_int_stop(&mut self) -> CLR_INT_STOP_W {
        CLR_INT_STOP_W { w: self }
    }
    #[doc = "Bit 4 - Master TX interrupt clear."]
    #[inline(always)]
    pub fn clr_int_tx(&mut self) -> CLR_INT_TX_W {
        CLR_INT_TX_W { w: self }
    }
    #[doc = "Bit 3 - Master RX interrupt clear."]
    #[inline(always)]
    pub fn clr_int_rx(&mut self) -> CLR_INT_RX_W {
        CLR_INT_RX_W { w: self }
    }
    #[doc = "Bit 2 - Slave ACK error interrupt clear."]
    #[inline(always)]
    pub fn clr_int_ack_err(&mut self) -> CLR_INT_ACK_ERR_W {
        CLR_INT_ACK_ERR_W { w: self }
    }
    #[doc = "Bit 1 - Bus arbitration failure interrupt clear."]
    #[inline(always)]
    pub fn clr_int_arb_loss(&mut self) -> CLR_INT_ARB_LOSS_W {
        CLR_INT_ARB_LOSS_W { w: self }
    }
    #[doc = "Bit 1 - Bus transfer completion interrupt clear."]
    #[inline(always)]
    pub fn clr_int_done(&mut self) -> CLR_INT_DONE_W {
        CLR_INT_DONE_W { w: self }
    }
    #[doc = "Writes raw bits to the register."]
    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
        self.0.bits(bits);
        self
    }
}
#[doc = "I2C_ICR is the I2C interrupt clear register.\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [i2c_icr](index.html) module"]
pub struct I2C_ICR_SPEC;
impl crate::RegisterSpec for I2C_ICR_SPEC {
    type Ux = u32;
}
#[doc = "`write(|w| ..)` method takes [i2c_icr::W](W) writer structure"]
impl crate::Writable for I2C_ICR_SPEC {
    type Writer = W;
}
#[doc = "`reset()` method sets I2C_ICR to value 0"]
impl crate::Resettable for I2C_ICR_SPEC {
    #[inline(always)]
    fn reset_value() -> Self::Ux {
        0
    }
}
